C++ into synthesisable Verilog HDL (a.k.a. NANDGGIR)

Working to develop 'NANDGGIR', a 'C++ into synthesisable Verilog' software tool. The actual process of conversion involves various program transformations, using LLVM-Clang compiler project. The work and challenges involved as a Compiler Developer is to work independently in bringing this novel, non-obvious and useful product named 'NANDGGIR' as a 'C++ to Verilog' software tool. This isn't a trivial work to be completed in short time and it's expected sometime by mid 2013.